## {Optimization of Bit Length of Variables for Hardware Synthesis from C Programs

## 小川 修 (9751025)

The design of hardware modules with high level languages such as C
language has been paid attention from the point of the design
productivity. The optimization function of such compilers has a great
influence on the area and the performance of the synthesized circuits,
and is studied hard. In this paper, we discuss the hardware oriented
optimization methods required in such compilers. We propose an
estimation algorithm of necessary bit length of variables to minimize
data-path. This estimation algorithm analyzes the Control/Data-Flow
Graph translated from C programs and decides the bit length of each
variable. On several experiments, the bit length of variables can be
reduced by half with respect to the declared length. This method is
efficient not only for reducing the area of VLSI circuits but also for
reducing the delay of the operations such as addition and subtraction.