The slowing down of Moore's law in the fast than ever-growing demand for efficient computing technologies has driven the rise of several unconventional computing paradigms. One of which gain significant attention is stochastic computing (SC). Through unary bitstream encoding format, the SC offers fault tolerance and a low power advantage. This technique, however, incurs higher latency compare to binary-radix computing. Besides, it requires a relatively expensive stochastic generator. Many researchers have strived for feasible solutions by offering various methods, including time-based stochastic computing (TBSC), which exploits PWM signals' duty-cycle in denoting stochastic values. Although the method reduces the latency somehow, its SNG implementation is still relatively complex, thus opening the chance for further improvement.
This dissertation presents a three-stage attempt to develop a multi-domain stochastic computing (MDSC) circuit, which exploits analog and stochastic domains concurrently. Firstly, focusing on reducing the original TBSC circuit's complexity, we design a totally different and way simpler SNG by utilizing neuron-MOS technology. In the second stage, we revise the circuit and shift the primary concern to improve the number representation and operation accuracy. For the convenience of testing, the circuit is also equipped with a duty-cycle detector. Finally, further expansion in the scheme accomplishes an MDSC circuit that facilitates number representations in the form of pulse-strength (analog) and pulse-width (stochastic) of a signal. The design is then simulated in a $0.18$ $\mu$m CMOS technology. The multiply and accumulate calculations (MACs) are implemented for proof-of-concept, achieving an average accuracy of 95.3\%. More importantly, the transistor counting, power consumption, and latency decrease to 6.1\%, 55.4\%, and 4.2\% of the state-of-art TBSC circuit, respectively. Detailed investigation of the circuit's robustness against temperature and process variations is presented. Additionally, we provide example usage of the TBSC circuit in realizing the MacLaurin Polynomial and stochastic neural networks.