The presentation starts with a brief idea of counterfeited integrated circuits (ICs) which are now becoming a global threat to the IC supply chain due to the outsourcing of low-cost fabrication. Counterfeiting components include recycled, cloned, overproducing, etc., where 80% of components are recycled one. Moreover, the promising benefits of fields programmable gate arrays (FPGAs) have recently created more risk of recycling. In addition to increasing the financial losses of IC manufacturing companies, recycled FPGAs are also vulnerable to many applications particularly in critical areas such as medical, communication systems, automobiles, etc. Thus, recycled FPGAs are one of the important reliability issues in hardware security which requires effective techniques to detect and avoid infiltration of recycled FPGAs in the ICs supply chain.
This research work presents a sophisticated ring oscillator (RO) designed to exhaustively characterize aging deterioration of all paths in all look-up tables (LUTs) in the FPGAs referred to as exhaustive fingerprint (X-FP). In X-FP analysis, the delay information of each path of all LUTs in the FPGA can be accurately captured. However, the X-FP measurement for recycled FPGA detection not only increases the testing cost considerably but also produces a large number of measured data that cannot be handled by typical machine learning (ML) algorithms when they are used as a feature vector. To overcome these challenges, firstly this research work has proposed a cost-efficient recycled FPGA detection by using the virtual probe (VP) technique which accurately predicts the spatial process variation of all RO frequencies on a die as a fingerprint (FP) by using a very small number of the testing circuits. Secondly, to handle a large number of feature vectors in the ML-based detection, this work has analyzed FP using with-in die (WID) variation modeling. WID modeling based feature engineering method efficiently detects the recycled FPGA with reduced database maintenance cost. Finally, a combination of VP and WID methods is used in X-FP characterization for high-quality recycled FPGA detection with minimum testing costs. The discussion ends with the prospective advantages of the proposed method for future hardware security.