VLSI Architectures of Selective FEC-based Transceivers in Optical Wireless and Radio Frequency Communication Systems

Nguyen Duc Phuc ( 1561209 )


Presentation abstract of my public hearing include five sections: Introduction, Contribution 01, Contribution 02, Contribution 03 and Conclusion. Firstly, in the first section: Introduction; I present overview of my research topic. Specifically, I present research challenges in heterogeneous wireless systems; especially, I focus on convergence of hybrid optical wireless and radio frequency (RF) wireless systems. Indeed, improving channel reliability by applying FEC codes is ubiqitous in many optical/RF wireless transceivers. A FEC solution which can be applied in many transceivers in both optical and wireless systems, is the target of this thesis. Besides introducing briefly about WSN and VLC systesm, I also introduce the overview of popular FEC algorithms in this section. Secondly, in the section: Contribution 01; after presenting related works and problems of FEC-based transceivers in WSNs, I introduce a multi-mode error-correction solution which is based on split-concatenation of low-constraint convolutional code and truncated-iteration layered-decoding LDPC (TILD-LDPC) block code. The proposed FEC solution can offer many operation modes with different levels of error-correction performance and transmit power. Moreover, besides guaranteeing competitive BER performances, the proposed FEC approach is also a reduced-complexity error-correction solution by implementing low-complexity versions of convolutional code and LDPC. Next, I present experimental results including BER performances and transmission-power reduction of the proposed method. Thirdly, in the section: Contribution 02; I open this section by some preliminaries and definitions in VLC systems. Specifically, I introduce indoor positioning system (IPS) and problems related to flicker mitigation. Next, FEC-based approaches which can maintain flicker mitigation in VLC systems are introduced. Then, I introduce a non-RLL flicker mitigation method which concatenates a pre-scrambler with a Polar encoder. Experimental results of flicker mitigation, run-length reduction, BER/FER, and hardware architectures of the proposed non-RLL VLC transmitter/receiver are extensively presented in this Section. Fourthly, in the section: Contribution 03; I present problems of current beacon network models. In particular, I show some evaluation results of processing delay of VLC transmitters to demonstrate the problems. Next, an FPGA-based beacon network is introduced with hardware architectures are described in details. Experimental results of synthesis of proposed architectures are also introduced in this Section. Finally, the section Conclusion will conclude my presentation with summary of proposals. Besides, I also introduce some future works which I will conduct in near future.

Fifth-generation (5G) and beyond communication networks include heterogeneous wireless communication systems, in which the convergence of hybrid radio frequency (RF) and optical wireless networks is one of the key targets. In this thesis, we focus on channel-reliability enhancement of Forward Error Correction (FEC) based transceivers which are now applied widely in optical and RF wireless systems; specifically, Visible Light Communication (VLC) systems and Wireless Sensor Networks (WSNs) are taken into account. Firstly, expected features of FEC solutions in WSNs transceivers are high coding-gain, low-complexity, and transmission-power efficiency. Therefore, we introduce an FEC approach based on split-concatenation of a low-constraint convolutional code and a truncated-iteration layered-decoding LDPC (TILD-LDPC) block code. Our solution offers four operational modes with different levels of error-correction performance and transmission power. Besides achieving competitive bit-error-rate performance, the proposed scheme could be applied in many operational scenarios of WSN nodes. Secondly, VLC systems are now applied widely in indoor positioning systems (IPS) in which VLC-LED beacons are assigned with fixed position identifications. In IPS, the massive installation costs of dedicated embedded boards or programmable oscillators for VLC-LED beacons could be reduced if the VLC beacon network is managed by a central processing node. Unfortunately, due to limited memories and minimal processing capabilities, embedded processors should not be employed for the central node. On the other hand, VLC-specialized hardware could be implemented to accelerate the processing delay of the central node. However, hardware implementations of VLC transmitters and receivers have not been investigated before this, and typical VLC transmitter/receiver routines, such as encoding/decoding of run-length limited (RLL) codes and FEC codes, have been processed purely on embedded processors' firmware. However, recent work on soft-decoding of RLL and FEC have shown that they are bulky and time-consuming computations. This makes a hardware implementation in the VLC transmitter/receiver heavy and unrealistic. In this thesis, we introduce a couple of compact Polar-code-based VLC transmitters and receivers. Compared with related works, our VLC transmitter is a non-RLL one, which means flicker mitigation can be guaranteed even without RLL codes. In particular, we utilized the centralized bit-probability distribution of a pre-scrambler and a Polar encoder to create a non-RLL flicker mitigation solution. Moreover, at the receiver, a 3-bit soft-decision filter was implemented to analyze signals received from the real VLC channel to extract log-likelihood ratio (LLR) values and feed them to the Polar decoder. Therefore, soft-decoding of the Polar decoder could be implemented to improve the bit-error-rate (BER) performance of the VLC system. Finally, we introduce a novel very-large-scale integration (VLSI) architecture for the proposed VLC transmitter and receiver, along with a synthesis of our design using FPGA/ASIC synthesis tools. Due to the non-RLL nature, our system has a preeminent code-rate and reduced complexity compared with other RLL-based receiver work. In this thesis, we also present evaluation results of the power consumption, area, and energy-per-bits of the proposed method.