| 日時(Date) | 2022年6月29日（水）4限（15:10--16:40) Wed. Jun. 29th, 2022, 4th period (15:10--16:40) |
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| 場所(Location) | エーアイ大講義室, AI Inc. Seminar Hall （L1） |
| 司会(Chair) | Renyuan Zhang |
| 講演者(Presenter) | Prof. Tsung-Yi Ho (National Tsing Hua University) |
| 題目(Title) | Majority-based Logic Optimization for AQFP Logic |
| 概要(Abstract) | Adiabatic Quantum-Flux-Parametron (AQFP) logic, an energy-efficient superconductor logic with no static power consumption and extremely low switching energy, is a promising alternative to CMOS for building energy-efficient computing systems. Due to the native majority function in AQFP logic, which can represent more complex logic with the same cost as the AND/OR function, the design of AQFP circuits is different from conventional digital circuits. Compared with AND-OR-inverter (AOI) logic structure commonly used in CMOS technology, majority-inverter logic enables a smaller size and depth of a circuit and is more suitable for AQFP logic. However, AQFP logic has the clock-based synchronization requirement and fan-out limitation, making traditional majority-based logic optimization methods not applicable to it. In this talk, a global optimization method over the majority-inverter graph (MIG) for both size and depth minimization of AQFP circuits will be presented. This talk will first introduce MIG-based transformation methods to construct the feasible domain for the objective of the normalized energy-delay product (EDP) and the product of JJ count and the depth of AQFP circuits. After that, Bayesian optimization will be described to explore the global optimal fixed-length transformation sequence applied to the AQFP majority-based logic optimization. |
| 講演言語(Language) | English |
| 講演者紹介(Introduction of Lecturer) | Professor Tsung-Yi Ho received his Ph.D. in Electrical Engineering from National Taiwan University in 2005. His research interests include several areas of computing and emerging technologies, especially in design automation of microfluidic biochips. He has been the recipient of the Invitational Fellowship of the Japan Society for the Promotion of Science (JSPS), the Humboldt Research Fellowship by the Alexander von Humboldt Foundation, the Hans Fischer Fellowship by the Institute of Advanced Study of the Technische Universität München, and the International Visiting Research Scholarship by the Peter Wall Institute of Advanced Study of the University of British Columbia. He was a recipient of the Best Paper Awards at the VLSI Test Symposium (VTS) in 2013 and IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems in 2015. He served as an ACM Distinguished Speaker for 2014-2020, a Distinguished Visitor of the IEEE Computer Society for 2013-2015, a Distinguished Lecturer of the IEEE Circuits and Systems Society for 2016-2017, the Chair of the IEEE Computer Society Tainan Chapter for 2013-2015, the Chair of the ACM SIGDA Taiwan Chapter for 2014-2015, and the Secretary General of the IEEE Taipei Section for 2019-2020. Currently, he serves as the VP Technical Activities of IEEE CEDA, and the Executive Committee of ASP-DAC and ICCAD. He is a Distinguished Member of ACM. |