ゼミナール発表

日時: 6月12日(月)3限 (13:30-15:00)


会場: L1

司会: 渡場 康弘
CHINTHANET BODIN 1651213: M, 1回目発表 ソフトウェア工学 松本 健一
title: Understanding the Spread of Security Vulnerabilities: A case study of the npm JavaScript Ecosystem
abstract: Nowadays, the third-party library reuse is very popular in the software projects because it can save development time and cost for the developers. The npm ecosystem is the example that shows how library reuse is part recent software development activities. It serves to host almost 500 thousand packages and has around 2 billion weekly packages downloads. Several studies show that vulnerability of library has become a big concern for the developer. In this presentation, I will first introduce the previous study on libraries usage in Java project. In that study, the authors found that the developers still use the outdated version of dependencies. Also, they reported that the developers are not likely to response to the librarys vulnerability report. In my work, then I propose to conduct an empirical study about when the developer of npm JavaScript software projects update the dependencies after the vulnerability is reported. I will present some preliminary result. My goal is to understand the awareness spread of these vulnerabilities within a software ecosystem. My results goes towards enabling faster awareness of these vulnerabilities.
 
RUANGWAN SHADE 1551208: M, 2回目発表 ソフトウェア工学 松本 健一, 飯田 元, 伊原 彰紀
title: Impact of Human Factors on the Participation Decision of Reviewers in Modern Code Review
abstract: Modern Code Review (MCR) plays a key role in software quality practices. In MCR processes, every new patch (i.e., a set of code changes) is examined by reviewers in order to identify weakness in source code prior to an integration into main software repositories. To mitigate the risk of having future defects, prior work suggests that MCR should be performed with intense review participation. Indeed, recent work shows that a low number of participated reviewers can lead to poor software quality. However, there is a likely case that a new patch still suffers from poor review participation even though reviewers were invited. Hence, we set out to investigate the factors that can influence the participation decision of an invited reviewer. In particular, due to human-intensive nature of code review, we suspect that human factors will play a crucial role in the participation decision of reviewers. Through a case study of 211,374 patches spread across the Android, OpenStack and Qt systems, we find that (1) 23%-66% of patches have at least one invited reviewer who ignored the review invitation; (2) our prediction models that include human factors outperform the models that do not include human factors with a precision of 0.68-0.78, a recall of 0.25-0.73, an F-measure of 0.38-0.75, an AUC of 0.82-0.89, and a Brier score of 0.06-0.13; (3) a review participation rate of an invited reviewers and code authoring experience of an invited reviewer are the most influential factors that influence the participation decision of an invited reviewer. Our results suggest that developers should consider these factors when inviting reviewers in order to increase the likelihood that an invited reviewer will accept a review invitation.
language of the presentation: English
 
TERDCHANAKUL PANNAVAT 1551209: M, 2回目発表 ソフトウェア工学 松本 健一, 飯田 元, 畑 秀明

title: Automatically Classifying Bug Report Type using N-Gram IDF

abstract: Automated tool sets have been made to be available for many software engineering activities and proven to be very useful in helping software developers to accelerate and increase the reliability of their development processes. In this study, we target on providing a new and pragmatic tool that automatically classifies the type of incoming bug report whether it is truly a bug or not. This is needed because the previous studies found that a significant number of bug reports are indeed misclassified between bugs and non-bugs, moreover, manually classify bug reports is a time-consuming task. In this research, we propose a technique to classify incoming bug reports by applying a brand-new text processing technique called N-Gram IDF, which is an extension of the IDF technique that can handle word and phrase of any length from a text corpus. We apply the N-Gram IDF to the corpora of pre-processed bug reports from three open-source software projects and combine them with three classification techniques, which are naives Bayes classifier, logistic regression, and random forest, to create bug report classifier models. We evaluate our techniques by comparing the performance of the classification model between N-Gram IDF-based models and pic modeling-based models. The numerical results show that out N-Gram IDF-based models have a superior performance than the topic modeling-based models. Our models show a remarkably promising result and have a potential to be extended into classification tasks of another type of documents

language of the presentation: English

 

会場: L2

司会: 新谷 道広
三谷 剛正 1561203: D, 中間発表 コンピューティング・アーキテクチャ 中島 康彦, 井上 美智子, 中田 尚, TRAN THI HONG
title: Studying the effective processing for distributed machine learning on edge computing
abstract:Recently, in the result of distributing of the huge number of IoT devices in our life space, the auto recognition systems are required to utilize the datas from the these IoT devices. The one of the most popular method of implements of these system is machine learning based on neural network (aka NN). Commonly, machine learning on the NN needs huge amount of calculation. Therefore, these calculations are commonly executed on the cloud computing or the single high performance computing machine. However, these solutions have some problems that calcuration space is strictrly limited and there is much latency to access the cloud. In our research, we defined edge network as that have some nodes from base stations to termination devices (ex. IoT devices ) and we want to process these calculation only in this edge network as possible. The one of the implementation of neural network consists of three types of layers, pooling, convolution and affine layer. We want to build the edge network framework that edge termination nodes process extraction for feature data by pooling and convolution layers and send these data to the edge network to process the remaind work. we investigate this assumption that these splited process is efficiencly, and estimate the requirements of edge termination nodes for NN calcuration and research the efficient method to transmit feature datas among edge network devices.
language of the presentation: Japanese
発表題目: エッジコンピューティングによる分散機械学習における効率処理検討
近年、IoTデバイス等が生活空間のあらゆる場所に設置された結果、膨大なデータを有効利用するために、自動識別が不 可欠となっている。 最も注目される手法の一つに、ニューラルネットワークによる機械学習があげられる。 機械学習には膨大な計算が必要であることから、計算資源が潤沢な単一の高性能計算機内やクラウドにおいて実行されている。 しかし、計算処理場所偏重やリアルタイム性に欠けるといった問題が指摘されている。 本研究においては、エッジを、末端ノードをIoTデバイスから基地局までのネットワークとし、機械学習を極力エッジの 末端側で処理させることを目的とする。 ニューラルネットワークの実装の一つに、畳み込み、プーリング、全結合処理層のネットワークの結合がある。畳み込み、プーリング処理によって特徴量を得るプロセスをエッジ末端で行い、 残りをエッジネットワーク側に送信することで、学習と推論を行わせ、機械学習を行わせる. IoTデバイス上での効率的な処理方法や、末端ノードとエッジネットワーク間のデータの効率的な送受信方法、その時における端末の実装等の検討を行う。
 
KAJKAMHAENG SUPASIT 1561206: D, 中間発表 コンピューティング・アーキテクチャ 中島 康彦, 井上 美智子, 中田 尚, TRAN THI HONG
title: Exploiting a CGRA-based accelerator for enhancing memory throughput and computing performance in graph processing
abstract: The characteristics of graph analytics applications being particularly data-intensive computing and irregular memory access pattern have challenged for designing modern computing systems. Based on a vertex-centric graph computation, a user-defined graph algorithm iteratively calculates each vertex of a graph by gathering input data from its adjacent vertices or incoming edges. Thus, the performance of execution significantly influenced by an achievable memory throughput. A CPU-based graph computation can, however, hardly accomplish to maximize the memory bandwidth due to a size limitation of instruction window which cannot include a sufficient number of memory request instructions to constantly access main memory. In this research, we propose a reconfigurable hardware accelerator equipped with a local memory for graph analytics applications that is specially designed for maximizing utilization of memory bandwidth with collecting an address list of input data into a local memory of the accelerator before the execution of each vertex started. The proposed architecture can sequentially stream many random memory access requests to main memory directly while the received data from main memory forwarded to a specified datapath configured inside CGRAs (Coarse-Grained Reconfigurable Array) in order to accelerate the execution of graph applications kernel. For our current implementation, the intermediate outcomes from the accelerator will be sent to CPU being more flexible for randomly updating the result or performing other dynamic memory transaction on main memory.
language of the presentation: English
 
NGUYEN DUC PHUC 1561209: D, 中間発表 コンピューティング・アーキテクチャ 中島 康彦, 岡田 実, 中田 尚, TRAN THI HONG
title: Effective Error-Correction Solutions for Low-throughput Wireless Communication Systems
abstract: The emerging Internet of Things (IoT) is getting closer to reality with many wireless standards tailored to specific applications. In wireless communication systems, Forward Error Correction (FEC) seems to be a very important component, especially in low-throughput systems which is strongly affected by the environment and system constraints. In this project, we have proposed two FEC solutions which aim to applications related to wireless sensor networks (WSNs) and visible light communication (VLC). In the first proposal, we have proposed a FEC method which is based on the concatenation decoding of truncated-iteration layered-decoding QC-LDPC (TILD-LDPC) and low-constraint convolutional code. Experimental results and theoretical arguments have shown that the proposed solution can achieve low-complexity, high error-correction performance; also it can be configured flexibly in split-concatenation modes to operate in different requirements of WSN applications. In the second proposal, we have proposed a FEC solution dedicated for VLC systems. From specific requirements of VLC systems such as low-complexity, short-data-frame supported, or well cooperated will Run-length limited (RLL) codes. We have proposed using Polar code with soft-decoding for the VLC systems. Although soft-decoding RLL is currently a hard-work, but we have demonstrated that using Polar code with soft-decoding will outperform the Reed-Solomon code which is currently defined in VLC PHY standards. Also, hardware implementation results of the proposed method have shown that the proposed Polar decoder can achieve low-complexity, low-latency which is suitable to be applied in VLC systems.
language of the presentation: English