ゼミナール発表

日時: 平成21年7月27日(月)3限 (13:30 -- 15:00)

場所: L1
司会: 嶋田

講演者: 姚 駿 (Jun YAO)
題目: Advanced Techniques for Low-Power Computer Designs
概要:

During the past decades, performance has been the major target of the evolution of computer designs. However, with the long-term advancement trend in the integrated circuit which has empirically followed Moore's Law, the problem from increasing power consumption has put restrictions on further processor performance improvements, for both portable computers and several high-end systems. From this view point, a performance only target will be less feasible, while emphasis must also be put on the power reduction techniques to help computer systems keep up with the scaling of process technology.

This lecture will concentrate on solutions to the power problem at the microprocessor and computer system level. Several low-power targeted designs will be introduced under this topic. In addition, this lecture will also gloss over adaptive employments of these basic low power techniques, for the purpose of achieving good trade-offs between power and performance.


ゼミナール I, II ページへ