’¡Ö’̤’Íè’ͽ’¬’¤ò’Íø’ÍÑ’¤·’¤¿’¥Þ’¥ë’¥Á’¥¨’¡¼’¥¸’¥§’¥ó’¥È’¶¯’²½’³Ø’½¬’¤Ë’´Ø’¤¹’¤ë’¸¦’µæ’¡× ’ȯ’ɽ’¹¼’³µ
’¡¡’¥Þ’¥ë’¥Á’¥¨’¡¼’¥¸’¥§’¥ó’¥È’´Ä’¶­’¤Ë’¤ª’¤±’¤ë’¥¨’¡¼’¥¸’¥§’¥ó’¥È’¤Î’Ŭ’±þ’¹Ô’ư’¤Î’¼Â’¸½’¤Ï’¡¤’¹©’³Ø’µÚ’¤Ó’ǧ’ÃÎ’²Ê’³Ø’¤Î’´Ñ’ÅÀ’¤«’¤é’¶½’Ì£’¿¼’¤¤’²Ý’Â꒤ǒ¤¢’¤ë’¡¥’¤½’¤Î’Ãæ’¤Ç’¤â’¡¤’³Ø’½¬ ’¤Ë’¤è’¤ë’Ŭ’±þ’¹Ô’ư’¤Î’¼«’Χ’Ū’³Í’ÆÀ’¤Ë’´Ø’¤¹’¤ë’¸¦’µæ’¤¬’¡¤’¶¯’²½’³Ø’½¬’¤Î’ȯ’Ÿ’¤ò’·À’µ¡’¤È’¤·’¤Æ’¶á’ǯ’Ãí’ÌÜ’¤ò’½¸’¤á’¤Æ’¤¤’¤ë’¡¥

’¶¯’²½’³Ø’½¬’¤Ï’¤â’¤È’¤â’¤È’¡¤’¥Þ’¥ë’¥³’¥Õ’·è’Äê’²á’Äø’¤ò’ÂÐ’¾Ý’¤È’¤·’¤Æ’ȯ’Ÿ’¤·’¤Æ’¤­’¤¿’¡¥’¤½’¤·’¤Æ’¡¤’¤³’¤ì’¤Þ’¤Ç’¤Ë’Êó’¹ð’¤µ’¤ì’¤Æ’¤¤’¤ë’¥Þ’¥ë’¥Á’¥¨’¡¼’¥¸’¥§’¥ó’¥È’´Ä’¶­’¤Ë’¤ª’¤±’¤ë ’¶¯’²½’³Ø’½¬’¤Î’¸¦’µæ’¤Î’¤Û’¤È’¤ó’¤É’¤Ç’¤Ï’¡¤’¤³’¤Î’¥Þ’¥ë’¥³’¥Õ’·è’Äê’²á’Äø’¤ò’ÂÐ’¾Ý’¤È’¤·’¤Æ’Äê’¼°’²½’¤µ’¤ì’¤¿’ÅÁ’Åý’Ū’¤Ê’¶¯’²½’³Ø’½¬’Ë¡’¤¬’¤½’¤Î’¤Þ’¤Þ’Ŭ’ÍÑ’¤µ’¤ì’¤Æ’¤¤’¤ë’¡¥’¤·’¤«’¤· ’¤Ê’¤¬’¤é’¡¤’¥Þ’¥ë’¥³’¥Õ’·è’Äê’²á’Äø’¤ò’ÂÐ’¾Ý’¤È’¤·’¤Æ’Äê’¼°’²½’¤µ’¤ì’¤¿’¶¯’²½’³Ø’½¬’Ë¡’¤ò’¤½’¤Î’¤Þ’¤Þ’¥Þ’¥ë’¥Á’¥¨’¡¼’¥¸’¥§’¥ó’¥È’´Ä’¶­’¤Ë’Ŭ’ÍÑ’¤·’¤¿’¾ì’¹ç’¡¤’¡Ø’»þ’´Ö’¤È’¶¦’¤Ë’ÊÑ’²½’¤¹ ’¤ë’¾’¥¨’¡¼’¥¸’¥§’¥ó’¥È’¤Î’¹Ô’ư’·è’Äê’´Ø’¿ô’¡Ù’¤È’¡Ø’»þ’ÉÔ’ÊÑ’¤Ê’¾õ’ÂÖ’Á«’°Ü’´Ø’¿ô’¡Ù’¤Î’°ã’¤¤’¤ò’¶è’ÊÌ’¤Ç’¤­’¤Ê’¤¤’¤È’¤¤’¤¦’·ç’ÅÀ’¤¬’¤¢’¤ë’¡¥

’¤½’¤³’¤Ç’ËÜ’¸¦’µæ’¤Ç’¤Ï’¡¤’¤Þ’¤º’¡¤’¥Þ’¥ë’¥³’¥Õ’·è’Äê’²á’Äø’¤ò’ÂÐ’¾Ý’¤È’¤·’¤Æ’Äê’¼°’²½’¤µ’¤ì’¤¿Q’³Ø’½¬’¤È’¸Æ’¤Ð’¤ì’¤ë’¶¯’²½’³Ø’½¬’Ë¡’¤ò’¡¤’¡Ø’»þ’´Ö’¤È’¶¦’¤Ë’ÊÑ’²½’¤¹’¤ë’¾’¥¨’¡¼’¥¸’¥§’¥ó’¥È ’¤Î’¹Ô’ư’·è’Äê’´Ø’¿ô’¡Ù’¤ò’¹Í’θ’¤Ë’Æþ’¤ì’¤é’¤ì’¤ë’¤è’¤¦’¤Ë’³È’Ä¥’¤·’¤¿’¿·’¤¿’¤Ê’¥Þ’¥ë’¥Á’¥¨’¡¼’¥¸’¥§’¥ó’¥È’¶¯’²½’³Ø’½¬’Ë¡’¤ò’Äó’°Æ’¤¹’¤ë’¡¥’¤½’¤·’¤Æ’¡¤’¥¨’¡¼’¥¸’¥§’¥ó’¥È’¿ô’¤¬’£²’ÂÎ’¤Î’¾ì’¹ç ’¤Ë’¤ª’¤¤’¤Æ’¡¤’Äó’°Æ’¼ê’Ë¡’¤Ë’¤è’¤ê’¸ú’²Ì’Ū’¤Ê’³Ø’½¬’¤¬’¹Ô’¤¨’¤ë’¤³’¤È’¤ò’¼Â’¸³’Ū’¤Ë’¼¨’¤¹’¡¥

’¤È’¤³’¤í’¤Ç’¡¤’¤³’¤Î’Äó’°Æ’¼ê’Ë¡’¤Ï’¡¤’´Ä’¶­’Æâ’¤Ë’¸’ºß’¤¹’¤ë’¥¨’¡¼’¥¸’¥§’¥ó’¥È’¿ô’¤¬’Áý’²Ã’¤¹’¤ë’¤È’¡¤’¤½’¤Î’Áý’²Ã’¤Ë’ÂÐ’¤·’¤Æ’³Ø’½¬’¶õ’´Ö’¤Î’¥µ’¥¤’¥º’¤¬’»Ø’¿ô’´Ø’¿ô’Ū’¤Ë’Áý’Âç’¤¹’¤ë’¤È’¤¤ ’¤¦’·ç’ÅÀ’¤ò’»ý’¤Ä’¡¥’¶¯’²½’³Ø’½¬’¤Ë’¤ª’¤¤’¤Æ’¡¤’³Ø’½¬’¶õ’´Ö’¥µ’¥¤’¥º’¤Î’»Ø’¿ô’´Ø’¿ô’Ū’Áý’Â璤ϒ¡¤’¡Ø’¼¡’¸µ’¤Î’¼ö’¤¤’¡Ù’¤È’¸Æ’¤Ð’¤ì’¡¤’³Ø’½¬’¤ò’Âç’¤­’¤¯’ÃÙ’¤é’¤»’¤ë’¸¶’°ø’¤È’¤Ê’¤ë’¡¥’¤½’¤³’¤Ç’ËÜ ’¸¦’µæ’¤Ç’¤Ï’¡¤’¼¡’¤Ë’¡¤’¡Ø’»þ’´Ö’¤È’¶¦’¤Ë’ÊÑ’²½’¤¹’¤ë’¾’¥¨’¡¼’¥¸’¥§’¥ó’¥È’¤Î’¹Ô’ư’·è’Äê’´Ø’¿ô’¡Ù’¤ò’¹Í’θ’¤Ë’Æþ’¤ì’¤¿’¶¯’²½’³Ø’½¬’Ë¡’¤Ç’¡¤’³Ø’½¬’¶õ’´Ö’¥µ’¥¤’¥º’¤¬’¥¨’¡¼’¥¸’¥§’¥ó’¥È’¿ô’¤Î’Áý’²Ã ’¤Ë’ÂÐ’¤·’¤Æ’»Ø’¿ô’´Ø’¿ô’Ū’¤Ë’Áý’Âç’¤·’¤Ê’¤¤’¿·’¤¿’¤Ê’¶¯’²½’³Ø’½¬’¤Î’ÏÈ’ÁÈ’¤ò’Äó’°Æ’¤¹’¤ë’¡¥’¤½’¤·’¤Æ’¡¤’¥¨’¡¼’¥¸’¥§’¥ó’¥È’¿ô’¤¬’Áý’²Ã’¤·’¤¿’¾ì’¹ç’¤Ë’¤ª’¤¤’¤Æ’¡¤’¤³’¤Î’Äó’°Æ’¼ê’Ë¡’¤Ë’¤è’¤ê’¡¤’¸ú ’²Ì’Ū’¤Ê’³Ø’½¬’¤¬’¹Ô’¤¨’¤ë’¤³’¤È’¤ò’¼Â’¸³’Ū’¤Ë’¼¨’¤¹’¡¥


0361007 ’ÊÒ’»³’¡¡’½Ó’Ϻ
’¡Ö’À¸’ÂÎ’À®’ʬ’ư’ÂÖ’¤Î’¿ô’Íý’¥â’¥Ç’¥ë’¤Ë’¤è’¤ë’²ò’ÀÏ’¡×

’ȯ’ɽ’¹¼’³µ
’À¸’ÂÎ’¤Î’´ï’´±’¤ä’ÁÈ’¿¥’¤Ï’¡¢’¸Ä’¡¹’¤Î’ºÙ’˦’¤¬’½¸’¹ç’¤·’¤¿’ÉÔ’¶Ñ’¼Á’¹½’¤’¤ò’·Á’À®’¤·’¤Æ’¤ª’¤ê’¡¢’Æâ’³°’´Ä ’¶­’¤Î’Êђư’¤Ë’ÂÐ’¤·’¤Æ’¾ï’¤Ë’°ì’Ä꒤Βµ¡’ǽ’¤ò’°Ý’»ý’¤¹’¤ë’¤¿’¤á’¤Ë’ÍÍ’¡¹’¤Ê’¥×’¥í’¥»’¥¹’¤ò’´Þ’¤à’ʪ’¼Á’¤Î ’°Ü’ư’¸½’¾Ý’¤¬’À¸’¤¸’¤Æ’¤¤’¤ë’¡£’¤³’¤Î’´ï’´±’¤ä’ÁÈ’¿¥’¤Ë’¤ª’¤±’¤ë’ʪ’¼Á’¤Î’°Ü’ư’¸½’¾Ý’¤Ï’¡¢’¿ô’¿’¤¯’¤Î’¹Ú ’ÁÇ’¤È’¤½’¤ì’¤Ë’´Ø’¤ï’¤ë’²½’³Ø’È¿’±þ’¤Ë’¤è’¤ê’Ê£’»¨’¤Ê’Âå’¼Õ’À©’¸æ’¥Í’¥Ã’¥È’¥ï’¡¼’¥¯’¤ò’¹½’ÃÛ’¤·’¤Æ’¤¤’¤ë’¡£ ’ËÜ’ÏÀ’ʸ’¤Ç’¤Ï’¡¢’¤³’¤Î’¥Í’¥Ã’¥È’¥ï’¡¼’¥¯’¥·’¥¹’¥Æ’¥à’¤Ë’´Ø’Í¿’¤·’¤Æ’¤¤’¤ë’À¸’ÂÎ’Æâ’ʪ’¼Á’¤Î’¥Ç’¡¼’¥¿’¤è’¤ê ’ʪ’¼Á’°Ü’ư’¥â’¥Ç’¥ë’¤ò’¹½’ÃÛ’¤·’¡¢’¥·’¥ß’¥å’¥ì’¡¼’¥·’¥ç’¥ó’²ò’ÀÏ’¤ò’¹Ô’¤¦’¤³’¤È’¤Ë’¤è’¤ê’¡¢’¥·’¥¹’¥Æ’¥à’¤È ’¤·’¤Æ’¤Î’µó’ư’¤«’¤é’Ê£’»¨’¤Ê’ºÙ’˦’Æâ’Âå’¼Õ’¤Î’ư’Ū’¤Ê’¿¶’¤ë’Éñ’¤¤’¤ò’Îà’¿ä’¤·’¡¢’À¸’ÂÎ’À®’ʬ’ư’ÂÖ’¤Ë’´Ø ’¤¹’¤ë’Âå’¼Õ’µ¡’ǽ’¤ò’²ò’ÀÏ’¤¹’¤ë’¡£’¤¹’¤Ê’¤ï’¤Á’¡¢’¥³’¥ó’¥Ñ’¡¼’¥È’¥á’¥ó’¥È’¥â’¥Ç’¥ë’¤Ë’¤è’¤ë’ÃÀ’½Á’»À’¤Î’IJ ’´Î’½Û’´Ä’ư’ÂÖ’²ò’ÀÏ’¡¢’¥«’¥ª’¥¹’¥â’¥Ç’¥ë’¤È’¿ô’Íý’¥â’¥Ç’¥ë’¤ò’ÁÈ’¤ß’¹ç’¤ï’¤»’¤¿’·ì’Åü’Ã͒ͽ’¬’Ë¡’¤Î’Äó ’°Æ’¡¢’¤ª’¤è’¤Ó’¡¢’À¸’ÂÎ’¥¤’¥ó’¥Ô’¡¼’¥À’¥ó’¥¹’·×’¬’¤Ë’¤è’¤ë’ÂÎ’¿å’ʬ’ÎÌ’¤Î’Êђư’¿ä’Ä꒤˒¤Ä’¤¤’¤Æ’½Ò’¤Ù’¤ë’¡£
’¥­’¡¼’¥ï’¡¼’¥É’¡§ ’ÃÀ’½Á’»À’ư’ÂÖ’¥â’¥Ç’¥ë’¡¤’¥Ö’¥É’¥¦’Åü’¡Ý’¥¤’¥ó’¥¹’¥ê’¥ó’Âå’¼Õ’·Ï’¥â’¥Ç’¥ë’¡¤’¥«’¥ª’¥¹’¡¤’·ì’Åü’ͽ’¬’Ë¡’¡¢ ’¥Ð’¥¤’¥ª’¥¤’¥ó’¥Ô’¡¼’¥À’¥ó’¥¹

0261204 Virendra Singh
’¡ÖInstruction-Based Self-Testing of Performance Oriented Faults in Modern Processors’¡×

Abstract
Aggressive microprocessor design methodologies using gigahertz clock and very deep sub-micron technology are necessitating the use of at-speed testing of small and distributed timing defects caused by process variations during manufacturing. A primary objective of such tests is to test for the faults that can lead to performance degradation, such as delay faults. However, at-speed testing using external tester is not an economically viable scheme and hardware BIST leads to unacceptable performance loss and area overhead. A new paradigm, instruction-based self-testing, can alleviate these problems as it uses processor instructions to deliver the test patterns and collect the test responses. Also, it has the ability to link to low level fault models and it is well-suited methodology for testing processors, embedded processor cores, IP cores, and SoCs. Moreover, the same test can also be used for online periodic testing of processors to improve the reliability.

This thesis proposes an instruction-based self-testing methodology for delay fault testing of modern processors in a chronological way by first dealing with non-pipelined processors, and then pipelined processors and superscalar processor architectures.

In order to test a non-pipelined processor a graph theoretic model, called instruction execution graph based on the register transfer level description of the processor is developed. This model, in conjunction with the structural and functional information, is used to identify and classify all paths into functionally testable and untestable paths and to generate tests and test instruction sequences that can be applied in functional mode of operation of the processor. The completeness of the test method is guaranteed by extracting constraints for the paths that are testable.

The approach proposed above is expanded to include pipeline architectures. A new graph model, called pipeline instruction execution graph, is defined that captures the effect of executing multiple instructions concurrently. This graph model is then used to generate tests and test sequences for normal as well as forwarding paths between different stages of a pipeline processor.

Finally, the thesis explores path delay testing of superscalar architectures, one of the most complex architectures of the modern processors. Such architectures use out of order execution technique to enhance the throughput, which poses serious challenges to instruction-based testing. This thesis identifies test related issues. It proposes a superscalar processor model, called superscalar instruction execution graph, and provides a method of generating test programs that can force scheduler to execute the instructions in the desired order to test the processor.

The effectiveness of all the above stated approaches has been demonstrated through experimental results for some representative processors.


0361028 ’º¬’ËÜ’¡¡’¹Ò
’¡ÖG’¥¿’¥ó’¥Ñ’¥¯’¼Á’¶¦’Ìò’·¿’¼õ’ÍÆ’ÂÎ’¤¬’¥ª’¥ê’¥´’¥Þ’¡¼’²½’¤¹’¤ë’ºÝ’¤Î’¥¤’¥ó’¥¿’¡¼’¥Õ’¥§’¥¤’¥¹’¤ò’ͽ’¬’¤¹’¤ë’¼ê’Ë¡’¤Î’³«’ȯ’¡×

’ȯ’ɽ’¹¼’³µ
G’¥¿’¥ó’¥Ñ’¥¯’¼Á’¶¦’Ìò’·¿’¼õ’ÍÆ’ÂÎ’¡ÊGPCRs’¡Ë’¤Ï’¡¢’»Ô’ÈÎ’Ìô’ʪ’¤Î4’³ä’°Ê’¾å’¤ò’À꒤ᒤ뒡¢’ÁÏ’Ìô’¤Ë’¤ª’¤±’¤ë’½Å’Í×’¤Ê’ɸ’Ū ’¤Î’°ì’¤Ä’¤Ç’¤¢’¤ë’¡£’¥Û’¥â/’¥Ø’¥Æ’¥í’¤Î’¥ª’¥ê’¥´’¥Þ’¡¼’¤È’¤·’¤Æ’¤â’µ¡’ǽ’¤·’¡¢’¤½’¤Î’ºÝ’¤Î’¥ê’¥¬’¥ó’¥É’¤Î’Áª’Âò’À­’¡¦’¿Æ’ÏÂ’À­’¤Ê’¤É’¤¬’¥â’¥Î’¥Þ’¡¼’¤È’¤Ï’°Û’¤Ê’¤ë’¤â’¤Î’¤¬’¿’¤¤’¤³’¤È’¤«’¤é’¡¢’¤½’¤Î’¥á’¥«’¥Ë’¥º’¥à ’¤Î’²ò’ÌÀ’¤¬’½Å’Í×’¤È’¤Ê’¤Ã’¤Æ’¤­’¤Æ’¤¤’¤ë’¡£’¤Þ’¤¿’¡¢’¥¤’¥ó’¥¿’¡¼’¥Õ’¥§’¥¤’¥¹’¤¬’ͽ’¬’¤µ’¤ì’¤ì’¤Ð’¡¢’¥ª’¥ê’¥´’¥Þ’¡¼’²½’¤ò’À©’¸æ’¤¹’¤ë’Äã’ʬ’»Ò’Àß’·×’¤Î’»Ø’¿Ë’¤È’¤Ê’¤ë’¡£’¤½’¤³’¤Ç’¡¢’²æ’¡¹’¤Ï’Êݒ¸’»Ä’´ð’¤Î’ʬ’ÉÛ’¤ò ’Íø’ÍÑ’¤·’¤Æ’¡¢’ʬ’»Ò’ɽ’ÌÌ’¤Î’¤É’¤³’¤Ë’¥¤’¥ó’¥¿’¡¼’¥Õ’¥§’¡¼’¥¹’¤¬’°Ì’ÃÖ’¤¹’¤ë’¤«’¤ò’ͽ’¬’¤¹’¤ë’¼ê’Ë¡’¤ò’³«’ȯ’¤·’¤¿’¡£’¥í’¥É’¥×’¥·’¥ó’¡¢’£Ä2’¥É’¡¼’¥Ñ’¥ß’¥ó’¼õ’ÍÆ’ÂÎ’¡¢’¦Â2’¥¢’¥É’¥ì’¥Ê’¥ê’¥ó’¼õ’ÍÆ’ÂÎ’¤Ê’¤É’¡¢’¥¤ ’¥ó’¥¿’¡¼’¥Õ’¥§’¡¼’¥¹’¤¬’´û’ÃÎ’¤Î’¥¯’¥é’¥¹AGPCRs’¤Ë’Ŭ’ÍÑ’¤·’¤¿’¤È’¤³’¤í’¡¢’ͽ’¬’ÎÎ’°è’¤Ï’¼Â’¸³’Ū’¤Ç’Äó’°Æ’¤µ’¤ì’¤Æ’¤¤’¤ë’ÎÎ’°è’¤È’°ì’Ã×’¤·’¤¿’¡£’½¾’¤Ã’¤Æ’¡¢’²æ’¡¹’¤¬’³«’ȯ’¤·’¤¿’¼ê’Ë¡’¤Ï’¥¯’¥é’¥¹A GPCRs ’¤¬’¥ª’¥ê’¥´’¥Þ’¡¼’²½’¤¹’¤ë’ºÝ’¤Î’¥¤’¥ó’¥¿’¡¼’¥Õ’¥§’¡¼’¥¹’¤ò’¸¡’½Ð’¤¹’¤ë’¼ê’Ë¡’¤È’¤·’¤Æ’Í­’ÍÑ’¤Ç’¤¢’¤ë’¤È’¹Í’¤¨’¤é’¤ì’¤ë’¡£’¤½’¤³’¤Ç’¡¢’¥¤’¥ó’¥¿’¡¼’¥Õ’¥§’¡¼’¥¹’¤¬’̤’ÃÎ’¤Î’¥¯’¥é’¥¹A GPCRs’¤Ø’Ŭ’ÍÑ’¤·’¤¿’¡£ ’ʬ’»Ò’·Ï’Åý’¼ù’¤Î’¥¯’¥é’¥¹’¥¿’¥ê’¥ó’¥°’¤Ë’´ð’¤Å’¤­’¡¢’µ¡’ǽ’Ū’¤Ë’Åù’²Á’¤Ç’¤¢’¤ë’¤È’¹Í’¤¨’¤é’¤ì’¤ë’¥µ’¥Ö’¥¿’¥¤’¥×’¤´’¤È’¤Ë’ʬ’¤±’¤¿’¸å’¡¢’¥µ’¥Ö’¥¿’¥¤’¥×’¤´’¤È’¤Î’¥¤’¥ó’¥¿’¡¼’¥Õ’¥§’¡¼’¥¹’¤ò’ͽ’¬’¤·’¤¿’¡£’¤½’¤Î’·ë ’²Ì’¡¢’Ʊ’¤¸’¥µ’¥Ö’¥Õ’¥¡’¥ß’¥ê’¡¼’Æâ’¤Ç’¤â’¥µ’¥Ö’¥¿’¥¤’¥×’¤´’¤È’¤Ë’¥¤’¥ó’¥¿’¡¼’¥Õ’¥§’¥¤’¥¹’¤¬’ÊÑ’²½’¤·’¤Æ’¤¤’¤¿’¡£’¤µ’¤é’¤Ë’¡¢’°ä’ÅÁ’À­’¶Ú’´Ö’Âå’À­’áÛ’Ú»’¤Î’¥á’¥«’¥Ë’¥º’¥à’¤Ë’¡¢D2’¥É’¡¼’¥Ñ’¥ß’¥ó’¼õ’ÍÆ’ÂÎ’¤¬’¥ª’¥ê ’¥´’¥Þ’¡¼’²½’¤¹’¤ë’ºÝ’¤Î’¥¤’¥ó’¥¿’¡¼’¥Õ’¥§’¥¤’¥¹’°Û’¾ï’¤¬’´Ø’Í¿’¤¹’¤ë’¤³’¤È’¤¬’¼¨’º¶’¤µ’¤ì’¤¿’¡£

Accumulating pharmacological and biochemical evidences have indicated that some G-protein-coupled receptors (GPCRs) form homo oligomers, hetero oligomers or both. The GPCRs oligomerizations are considered to be important for proper signal transduction. Furthermore, in some cases, the oligomerization has been suggested to be related to diseases. Therefore, an accurate prediction of the residues that interact upon oligomerization would further our understanding of signal transduction and the diseases in which GPCRs are involved. One of the complications for such a prediction is that the oligomerization interfaces differ with the subtypes, even within the same GPCR subfamily. Focusing on the distribution of residues conserved on the molecular surface in a particular subtype, we developed a new method to predict the interface for the GPCR oligomers, and applied it to several subtypes of known GPCRs to check the sensitivity. Subsequently, we found that predicted interfaces of rhodopsin, D2 dopamine receptor and ’¦Â2 adrenergic receptor agreed with the experimentally suggested interfaces, despite difference in the interface region among the three subtypes. Moreover, a highly conserved residue detected from the D2 dopamine receptor corresponded to a residue involved in a missense change found in the large family of myoclonus dystonia. Our observation suggestes the possibility that the disease is caused by the disorder of the oligomerization, although the molecular mechanism of the disease has not been revealed yet. The benefits and the pitfalls of the new method will be discussed, based on the results of the applications.

0361005 ’±Ò’Æ£ ’¾­’»Ë
’¡ÖStudies on Policy Based Route Management for Intra-domain and Inter-domain networks’¡Ê’¥É’¥á’¥¤’¥ó’Æâ’µÚ’¤Ó’¥É’¥á’¥¤’¥ó’´Ö’¥Í’¥Ã’¥È’¥ï’¡¼’¥¯’¤Î’¥Ý’¥ê’¥·’¤Ë’´ð’¤Å’¤¯’·Ð’Ï©’´É’Íý’¼ê’Ë¡’¤Ë’´Ø’¤¹’¤ë’¸¦’µæ’¡Ë’¡×

Abstract

In the current network management, operators have to implement their network to fit their management policy. The management policy is a set of demands from customers and mandates from business administrations such as delay limits and usable bandwidth, capacity limit controls and so on. However, the management policy is too abstract so that more specific description and processing are required for generating configuration for each individual component as their reflections. The goal of my research is to design and implement Policy Based Route Management (PBRM) methods: namely to give measures for operators to describe their preferences on route selections, to convert their descriptions to the actual router configurations, and to confirm the network to fulfill the requirements and keep its consistency. According to the current routing management architecture, we have to split our efforts into two categories: inter-domain and intra-domain networks.

For the inter-domain network management, Routing Policy Specification Language (RPSL) is standardized by Internet Engineering Task Force (IETF) as a method to express an autonomous system's (AS's) routing policies. The RPSL was widely deployed, and operators can register their policies written in RPSL to Internet Routing Registry (IRR) and generate router configurations with a tool called IRRToolSet. However, if description on primary route, which is vital route for their network operation, is missing, the connectivity may be lost between routers when we apply the automatic generated configurations to the routers. To establish the PBRM for inter-domain networks, a mechanism to maintain the consistency of the policy is highly required. In my research, the mechanism called Policy Check Server is proposed. The Policy Check Server is a system to check consistencies between AS's policies that are submitted by multiple network operation entities. In the case an operator registers its autonomous system's routing policies to the IRR, Policy Check Server examines if the policies are consistent with the peer AS's policies. This Policy Check Server is implemented and in operation at JPNIC as its first step of deployment.

On the other hand, in the intra-domain network, there are few tools to establish PBRM so far. In the management of the intra-domain network, tools with Simple Network Management Protocol (SNMP) capability are widely used. Although SNMP tools can set OSPF link costs to various routers, operators still have to decide the actual values of the cost manually. This is a nature to cause misconfiguration of routers and instability of networks, so that an automation tool to ease operators' burden is highly expected. However, there has been no study that tried to establish a method that generates link costs from policies. In my research, the system with both automatic generation of link costs and consistency check with management policies is proposed.

In this dissertation, background and "needs" of the PBRM are revealed, then the details of two system proposed in my research are discussed. Through the deployment of my systems, the value and usefulness of my systems are confirmed, however, several issues discussed in the later section of this dissertation are also raised as the future work. In general, PBRM is my first step toward the policy based network management. There are multiple potential directions of this research. Their discussions are also included to this dissertations.


0361210 ’Á¥’¤’¡¡’¹¯’É×
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0361213 ’µÜ’ºê’¡¡’À¯’±Ñ
’¡Ö’¥·’¥¹’¥Æ’¥à’¥ª’¥ó’¥Á’¥Ã’¥×’¤Î’¥Æ’¥¹’¥È’²ó’Ï©’ÌÌ’ÀÑ’¤È’¥Æ’¥¹’¥È’¼Â’¹Ô’»þ’´Ö’¤ò’Äã’¸º’¤¹’¤ë ’¥Æ’¥¹’¥È’ÍÆ’°×’²½’Àß’·×’¼ê’Ë¡’¤Î’¸¦’µæ(Studies on DFT for Reducing Its Area and Test Application Time of System-on-a-Chip)’¡×

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0461025 ’Ãæ’¼’¡¡’˧’¹Ô
’¡ÖStudies on Defect Level and Diagnosis for Built-in Self Test Architecture(’ÁÈ’¤ß’¹þ’¤ß’¼«’¸Ê’¥Æ’¥¹’¥È’Êý’¼°’¤Ë’¤ª’¤±’¤ë’ÉÔ’ÎɒΨ’¤ª’¤è’¤Ó’¸Î’¾ã’¿Ç’ÃÇ’¤Ë’´Ø’¤¹’¤ë’¸¦’µæ)’¡×

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0361041 Zhiqiang You
’¡ÖStudies on Power Constrained Test Techniques for VLSI Circuits’¡×

Abstract
Due to the chip density increasing drastically, power consumption becomes one of the most important factors of VLSI design. Furthermore, power and energy consumption of digital systems are considerably higher in test mode than in normal mode. This extra power consumption leads to many drawbacks, such as, decreased reliability, loss of yield, increased product cost, difficulty in performance verification, reduced autonomy of portable systems and so on. Hence, many techniques have investigated power minimization or power constraints test.

This thesis proposes several schemes and approaches to reduce peak power as well as average power at RT-level and at gate level respectively. Test application time and hardware overhead are also important factors. In our approaches, we try to minimize one or either under the given power constraints to make the test more effectively.

Focused on power reduction of RTL data path, this thesis proposes three non-scan BIST schemes, formulates three problems concerning the schemes, and introduces three power-constrained DFT algorithms to resolve these problems.

In adjacent non-scan BIST scheme, some registers are enhanced to test registers so that each functional module can be tested by test registers connected with the module directly or only through multiplexers. Though this scheme achieves short test application time, hardware overhead is very high. To overcome this problem, in the techniques of our laboratory, TPGs and RAs are placed only at PIs and POs respectively, and test patterns and test responses are transferred along paths in the data paths. We call this BIST scheme boundary non-scan BIST scheme. We also propose a more general BIST scheme that covers the above two schemes, adjacent non-scan BIST scheme and boundary non-scan BIST scheme. Generally, TPGs and RAs can be placed not only at the boundary of the data path but also inside of the data path. Any register inside the data path can be a candidate to be augmented to a TPG or an RA. We call this BIST scheme non-scan BIST scheme.

We formulate three problems employing the above testabilities satisfying peak power limit to minimize test application time, hardware overhead and either respectively. Three power-constrained DFT approaches are given to solve them. The first is for adjacent non-scan BIST scheme intend for short test application time. The second algorithm uses a boundary non-scan BIST scheme that focuses on achieving a low hardware overhead. This scheme, therefore, is more efficient in reducing the hardware overhead than previous methods. The third algorithm is based upon a general non-scan BIST scheme that explores possible trade-offs between hardware overhead and test application time under power constraints, rather than consider only one such factor, as previous published power-constrained methods do.

Focused on power reduction of the circuits at gate level, this thesis also proposes a low power scan test scheme and formulates a problem based on this scheme. In this scheme the flip-flops are grouped into N scan chains. At any time, only one scan chain is active during scan test. Therefore, both average power and peak power are reduced compared with conventional full scan test methodology. To resolve this problem, a tabu search-based approach is described to minimize test application time. In this approach we handle the information during deterministic test efficiently. For various benchmark circuits, this approach drastically reduces both average power and peak power dissipation at a little longer test application time.


0361010 ’´î’¼ï’¡¡’Æà’Èþ
’¡Ö’Æþ’ÎÏ’À©’Ìó’ÉÕ’¤­’Èó’Àþ’·Á’¥·’¥¹’¥Æ’¥à’¤Ë’ÂÐ’¤¹’¤ë’À©’¸æ’§’Àß’·×’¤ª’¤è’¤Ó’²ò’ÀÏ’¡×

’ȯ’ɽ’¹¼’³µ
’¼Â’ºÝ’¤Î’¥·’¥¹’¥Æ’¥à’¤Î’¿’¤¯’¤Ï’Èó’Àþ’·Á’¤Ç’¤¢’¤ê’¡¤ ’¥¢’¥¯’¥Á’¥å’¥¨’¡¼’¥¿’¤Î’À­’ǽ’¸Â’³¦’¤ä’À©’¸æ’ÂÐ’¾Ý’ÊÝ’¸î’¤Î’¤¿’¤á ’Æþ’ÎÏ’¤Ï’À©’¸Â’¤µ’¤ì’¤Æ’¤¤’¤ë’¡¥ ’¤Þ’¤¿’¡¤ ’¥â’¥Ç’¥ë’²½’¸í’º¹’¤ä’³°’Í𒤬’¸’ºß’¤¹’¤ë’¤¿’¤á’¡¤ ’À©’¸æ’§’¤Ï’¥í’¥Ð’¥¹’¥È’¤Ç’¤¢’¤ë’¤³’¤È’¤¬’µá’¤á’¤é’¤ì’¤ë’¡¥ ’¤½’¤Î’¤¿’¤á’¡¤ ’Èó’Àþ’·Á’À­’¤ä’Æþ’ÎÏ’À©’Ìó’¤ò’̵’»ë’¤·’¤Æ’À©’¸æ’§’¤ò’Àß’·×’¤·’¤¿’¤ê’¡¤ ’À©’¸æ’§’¤¬’½½’ʬ’¤Ê’¥í’¥Ð’¥¹’¥È’À­’¤ò’»ý’¤Ã’¤Æ’¤¤’¤Ê’¤¤’¾ì’¹ç’¡¤ ’¥Ñ’¥é’¥á’¡¼’¥¿’¥Á’¥å’¡¼’¥Ë’¥ó’¥°’¤Ë’Âç’ÊÑ’¤Ê’Ï«’ÎÏ’¤ò’Í×’¤·’¤¿’¤ê’¡¤ ’À©’¸æ’À­’ǽ’¤¬’Îô’²½’¤·’¤¿’¤ê’¡¤ ’ÊÄ’¥ë’¡¼’¥×’·Ï’¤¬’ÉÔ’°Â’Äê’²½’¤¹’¤ë’¶²’¤ì’¤¬’¤¢’¤ë’¡¥ ’À©’¸æ’§’¤Î’¹½’ÃÛ’¤ò’ÍÆ’°×’¤Ë’¤¹’¤ë’¤¿’¤á’¤Ë’¤Ï’¡¤ ’Èó’Àþ’·Á’À­’¡¤’Æþ’ÎÏ’À©’Ì󒤪’¤è’¤Ó’¥í’¥Ð’¥¹’¥È’À­’¤ò’ÍÛ’¤Ë’¼è’¤ê’°·’¤¦’¤³’¤È’¤¬’ɬ’Í×’¤Ç’¤¢’¤ë’¡¥ ’Ëܒȯ’ɽ’¤Ç’¤Ï’¡¤ ’Æþ’ÎÏ’¤Îk-’¥Î’¥ë’¥à’¤¬1’¤è’¤ê’¾®’¤µ’¤¤’Èó’Àþ’·Á’¥·’¥¹’¥Æ’¥à’¤Ë’ÂÐ’¤·’¤Æ’¡¤ ’¶É’½ê’À©’¸æLyapunov’´Ø’¿ô’¤¬’Í¿’¤¨’¤é’¤ì’¤Æ’¤¤’¤ë’¤È’¤¤’¤¦’²¾’Ä꒤Β¤â’¤È’¤Ç’¡¤ ’Ǥ’°Õ’¤Îk’¡æ1’¤Ë’Ŭ’ÍÑ’¤Ç’¤­’¤ë’¸¶’ÅÀ’°Ê’³°’¤Ç’Ï¢’³’¤Ê’¥í’¥Ð’¥¹’¥È’À©’¸æ’§’¤ò’Äó’°Æ’¤¹’¤ë’¡¥

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’µÕ’ºÇ’Ŭ’À©’¸æ’§’¤Î’¥»’¥¯’¥¿’;’͵’¤Î’²¼’¸Â’¤Ï’Æþ’ÎÏ’¤Î’Êý’¸þ’¥Ù’¥¯’¥È’¥ë’¤Ë’¤è’¤Ã’¤Æ’·è’¤Þ’¤ê’¡¤ ’µÛ’°ú’ÎÎ’°è’¤Ï’¥»’¥¯’¥¿’;’͵’¤È’Æþ’ÎÏ’À©’Ìó’¤Ë’¤è’¤Ã’¤Æ’·è’Äê’¤µ’¤ì’¤ë’¡¥ ’Æþ’ÎÏ’À©’Ìó’¤Î’¤â’¤È’¤Ç’¤Ï’¡¤ ’¥»’¥¯’¥¿’;’͵’¤È’µÛ’°ú’ÎÎ’°è’¤Ï’¥È’¥ì’¡¼’¥É’¥ª’¥Õ’¤Î’´Ø’·¸’¤Ë’¤¢’¤ê’¡¤ ’¤³’¤ì’¤é’¤ò’Ʊ’»þ’¤Ë’Âç’¤­’¤¯’¤¹’¤ë’¤³’¤È’¤Ï’¤Ç’¤­’¤Ê’¤¤’¡¥ ’¤½’¤Î’¤¿’¤á’¡¤ ’µÕ’ºÇ’Ŭ’À©’¸æ’§’¤Î’¸’ºß’¤¹’¤ë’ÎÎ’°è’¤Ï’¾®’¤µ’¤¯’¤Ê’¤Ã’¤Æ’¤·’¤Þ’¤¦’¤³’¤È’¤¬’¤¢’¤ë’¡¥ ’¤½’¤³’¤Ç’¡¤ ’¥»’¥¯’¥¿’;’͵’¤È’µÛ’°ú’ÎÎ’°è’¤ò’Ŭ’ÀÚ’¤Ë’Ä´’Àá’¤¹’¤ë’¤¿’¤á’¡¤ ’µÕ’ºÇ’Ŭ’À­’¤ò’̵’»ë’¤·’¤Æ’¥í’¥Ð’¥¹’¥È’¤Ê’À©’¸æ’§’¤ò’¹½’ÃÛ’¤¹’¤ë’¡¥


0361009 ’¿À’ºê ’ͺ’°ì’Ϻ
’¡ÖProtecting Secret Information in Software Processes and Products (’¥½’¥Õ’¥È’¥¦’¥§’¥¢’¤ª’¤è’¤Ó’¥½’¥Õ’¥È’¥¦’¥§’¥¢’³«’ȯ’¥×’¥í’¥»’¥¹’¤Ë’´Þ’¤Þ’¤ì’¤ë’Èë’Ì©’¾ð’Êó’¤Î’ÊÝ’¸î)’¡×

’ȯ’ɽ’¹¼’³µ
’¶á’ǯ’¡¤’¥·’¥¹’¥Æ’¥à’¤Î’°Â’Á´’À­’¤Ë’¤«’¤«’¤ï’¤ë’¡Ö’Èë’Ì©’¾ð’Êó’¡×’¤ò’´Þ’¤à ’¥½’¥Õ’¥È’¥¦’¥§’¥¢’¤¬’Áý’²Ã’¤·’¤Æ’¤¤’¤ë’¡¥ ’Èë’Ì©’¾ð’Êó’¤Î’Î㒤Ȓ¤·’¤Æ’¡¤ DRM’¥·’¥¹’¥Æ’¥à(Digital Rights Management System)’¤Î’°Å’¹æ’¸°’¡¤ ’¥é’¥¤’¥»’¥ó’¥Á’¥§’¥Ã’¥¯’¤Î’¤¿’¤á’¤Î’¾ò’·ï’ʬ’´ô’Ì¿’Îá’¡¤’¾¦’¶È’²Á’ÃÍ’¤Î’¹â’¤¤’¥¢’¥ë’¥´’¥ê’¥º’¥à’¤¬’µó’¤²’¤é’¤ì’¤ë’¡¥ ’ËÜ’¸¦’µæ’¤Î’ÌܒŪ’¤Ï’¡¤’Èë’Ì©’¾ð’Ê󒤬’¥æ’¡¼’¥¶’¤Ø’ή’½Ð’¤¹’¤ë’¤Î’¤ò’ËÉ’»ß’¤¹’¤ë’¤³’¤È’¤Ç’¤¢’¤ë’¡¥ ’Èë’Ì©’¾ð’Ê󒤬’¥æ’¡¼’¥¶’¤Ë’ή’½Ð’¤¹’¤ë’²Ä’ǽ’À­’¤È’¤·’¤Æ’¡¤’¼¡’¤Î2’¤Ä’¤ò’¹Í’¤¨’¤ë’¡¥ (1)’³°’Éô’¤Ë’ϳ’¤¨’¤¤’¤·’¤¿’¥½’¥Õ’¥È’¥¦’¥§’¥¢’³«’ȯ’¥×’¥í’¥»’¥¹’¤Î’ºî’¶È’À®’²Ì’ʪ(’¥½’¡¼’¥¹’¥³’¡¼’¥É’¡¤’»Å’ÍÍ’¤Ê’¤É) ’¤ò’ÄÌ’¤·’¤Æ’ή’½Ð’¤¹’¤ë’¡¥ (2)’¥æ’¡¼’¥¶’¤Ë’¤è’¤ë’¥½’¥Õ’¥È’¥¦’¥§’¥¢’¤Î’²ò’ÀÏ(’¥ê’¥Ð’¡¼’¥¹’¥¨’¥ó’¥¸’¥Ë’¥¢’¥ê’¥ó’¥°)’¤Ë’¤è’¤Ã’¤Æ’ή’½Ð’¤¹’¤ë’¡¥

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0361018 ’¶Ì’ÅÄ ’½Õ’¾¼
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0461205 ’Ë©’Íé ’¾°’¹¬
’¡ÖStudies on Prediciton of Protein Function Based on Oligopeptides’¡×

Abstract
The prediction of protein function using the sequence is one of the important research topics in bioinformatics. Meanwhile, the statistical characteristics of oligopeptide, relatively short subsequence, have been investigated. The main results of research include a new method based on oligopeptides. The research demonstrates that `oligopeptide' enable us to develop an effective method for predicting various protein function. A known function of a protein is regarded to be inherited to its oligopeptides, and the correspondence between oligopeptides and the function is calculated in the whole proteins. In the proposed method, unknown functions of proteins are predicted by means of the correspondence automatically.

Broad Applicability and High Performance: The prediction performance of the method is measured for several functions including GO terms and enzyme activities by recall-precision graphs using the 28,520 whole human proteins registered in RefSeq. In most cases on GO terms, it scores 70% recall with 80% precision. The proposed method is applicable in broad levels from a specific enzyme to large class of enzymes like 'transferases' (EC 2.-.-.-). In some cases on enzyme activities, it scores the maximum f-measure over 0.9. The results of these evaluation suggest that the proposed method is quite efficient for various protein functions.

Better than Other Methods: To clarify the performance of the proposed method objectively, the research includes a comparative research with some already proposed prediction methods based on homology search and pattern matching. For instance, on the prediction of protein-tyrosine kinase, The f-measures of homology search and pattern matching are 0.860 and 0.297, respectively, while the proposed method based on oligopeptides scores maximum f-measure of 0.932. The results of these evaluation suggest that the proposed method based on oligopeptides is more efficient than ones of homology search and pattern matching.

Consideration on Length of Oligopeptides: The research also characterises the relation between the length of oligopeptides and the prediction of protein functions. The performance of prediction is measured for the length of oligopeptides between 1 and 9. The results suggest that: 1) shorter oligopeptides than 4 are obviously less effective, 2) longer oligopeptides than 4 are almost equally effective, and 3) oligopeptides of 4 are intermediate. The prediction based on oligopeptides utilises coexistence of oligopeptides among proteins. The longer oligopeptides are more versatile than the shorter one because the longer oligopeptide is more varied than the shorter one, and the degree of the coexistence is inversely related to the length. The results of these evaluation suggest that length of 5 is quite effective and versatile.

The public hearing will be in Japanese.


0361037 ’¹Ô’Æì ’ľ’¿Í
’¡Ö’Åý’·×’Ū’¼ê’Ë¡’¤Ë’¤è’¤ë’°ä’ÅÁ’»Ò’ȯ’¸½’¾ð’Ê󒤫’¤é’¤Î’ºÙ’˦’¾õ’ÂÖ’¤Î’Ʊ’Ä꒤˒´Ø’¤¹’¤ë’¸¦’µæ’¡×

’ȯ’ɽ’¹¼’³µ
’¶á’ǯ’¡¤’¥Þ’¥¤’¥¯’¥í’¥¢’¥ì’¥¤’¤ä’Äê’Î̒Ū PCR ’Ë¡’¤Ê’¤É’¤ÎmRNA ’Äê’ÎÌ’²½’µ»’½Ñ’¤Ë’¤è’¤ê’¡¤ ’ºÙ’˦’¥µ’¥ó’¥×’¥ë’¤Ë’¤ª’¤±’¤ë’Êñ’³ç’Ū’¤Ê’°ä’ÅÁ’»Ò’ȯ’¸½’¾ð’Êó’¤ò’ÆÀ’¤ë’¤³’¤È’¤¬’²Ä’ǽ’¤È’¤Ê’¤ê’¡¤ ’ºÙ’˦’¤Î’¾õ’ÂÖ’¤È’°ä’ÅÁ’»Ò’ȯ’¸½’¤ò’ľ’ÀÜ’·ë’¤Ó’ÉÕ’¤±’¤Æ’²ò’ÀÏ’¤¹’¤ë’¡¤ ’¤¤’¤ï’¤æ’¤ë’¥È’¥é’¥ó’¥¹’¥¯’¥ê’¥×’¥È’¡¼’¥à’²ò’ÀÏ’¤¬’¹Ô’¤ï’¤ì’¤ë’¤è’¤¦’¤Ë’¤Ê’¤Ã’¤¿’¡¥ ’ËÜ’ÏÀ’ʸ’¤Ç’¤Ï’¡¤’¥È’¥é’¥ó’¥¹’¥¯’¥ê’¥×’¥È’¡¼’¥à’²ò’ÀÏ’¤Ë’¤ª’¤±’¤ë’½ô’Ìä’Âê’¤Ë ’ÂÐ’¤·’¤Æ’¡¤’´è’·ò’¤Ê’²ò’ÀÏ’¤ò’¹Ô’¤¦’¤¿’¤á’¤Î’Åý’·×’Ū’¼ê’Ë¡’¤Ë’´Ø’¤·’¤Æ’µÄ’ÏÀ’¤¹’¤ë’¡¥

’¤Þ’¤º’¡¤’Êñ’³ç’Ū mRNA ’¬’Äê’µ»’½Ñ’¤Î’°ì’¤Ä’¤Ç’¤¢’¤ë’¡¤’¥¢’¥À’¥×’¥¿’ÉÕ’²Ã’¶¥’¹ç PCR (ATAC-PCR) ’Ë¡’¤Ë’¤è’¤ê’ÆÀ’¤é’¤ì’¤ë’·Ö’¸÷’ÎÌ’¥Ç’¡¼’¥¿’¤Î’ÆÃ’ħ’¤È’¤½’¤Î’Êä’Àµ’Ë¡’¤Ë’¤Ä’¤¤’¤Æ’Êó’¹ð’¤¹’¤ë’¡¥ ’¤³’¤ì’¤Þ’¤Ç’Ìä’Â꒤Ȓ¤Ê’¤Ã’¤Æ’¤¤’¤¿’¥¢’¥À’¥×’¥¿’Ĺ’°Í’¸’¤Î’¬’Ä꒥В¥¤’¥¢’¥¹’¤Î ’²ò’ÌÀ’¤ò’¼ç’´ã’¤È’¤·’¡¤ATAC-PCR ’Ë¡’¤Ç’ÆÀ’¤é’¤ì’¤¿’¥Ç’¡¼’¥¿’¤Î’¾Ü’ºÙ’¤Ê’²ò’ÀÏ’¤ò’¹Ô’¤Ã’¤¿’¡¥ ’²ò’ÀÏ’·ë’²Ì’¤Ë’´ð’¤Å’¤­’·Ö’¸÷’¥Ô’¡¼’¥¯’ÃÍ’¤Ë’´Ø’¤¹’¤ë’´Ñ’¬’¥â’¥Ç’¥ë’¤Î’Äê’¼°’²½’¤ò’¹Ô’¤Ê’¤¤’¡¤ ’¥Î’¥¤’¥º’¹à’¤Î’¥Ñ’¥é’¥á’¡¼’¥¿’¤Î’¿ä’Äê’ÎÌ’¤Î’Ƴ’½Ð’¤È’¡¤’¤½’¤ì’¤é’¤ò’ÍÑ’¤¤’¤¿’¥Ô’¡¼’¥¯’ÃÍ’Êä’Àµ’Ë¡’¤ò’Äó’°Æ’¤·’¤¿’¡¥ ’¤³’¤Î’¼ê’Ë¡’¤ò’¡¤’¥¢’¥À’¥×’¥¿’¥Î’¥¤’¥º’²ò’ÀÏ’¤Î’¤¿’¤á’¤Ë’ÆÃ’²½’¤·’¤¿’ºÎ’¼è’¤µ’¤ì’¤¿’¥Ô’¡¼’¥¯’¥Ç’¡¼’¥¿’¤Ë’Ŭ ’ÍÑ’¤·’¡¤’¥¢’¥À’¥×’¥¿’°Í’¸’¥Î’¥¤’¥º’¤Î’¥Ñ’¥é’¥á’¡¼’¥¿’¤ò’µá’¤á’¡¤’¼¡’¤¤’¤Ç’¡¤ ’¼Â’¥Ç’¡¼’¥¿’¤Ë’ÂÐ’¤·’¥Ð’¥¤’¥¢’¥¹’Êä’Àµ’¤Î’Ŭ’ÍÑ’¤ò’»î’¤ß’¡¤’¤½’¤Î’Í­’¸ú’À­’¤ò’³Î’ǧ’¤·’¤¿’¡¥

’¼¡’¤Ë’¡¤’À¸’¤­’¤¿’ºÙ’˦’¤Ë’¤ª’¤±’¤ë’°ä’ÅÁ’»Ò’ȯ’¸½’¥À’¥¤’¥Ê’¥ß’¥¯’¥¹’¤Î’²ò’ÀÏ’¤ò’ÌÜ’»Ø’¤·’¡¤ ’°ä’ÅÁ’»Ò’ȯ’¸½’¥×’¥í’¥Õ’¥¡’¥¤’¥ë’¤Î’»þ’·Ï’Îó’¤Ë’ÂÐ’¤¹’¤ë’²ò’ÀÏ’Ë¡’¤Ë’¤Ä’¤¤’¤Æ’½Ò’¤Ù’¤ë’¡¥ ’¤³’¤³’¤Ç’¤Ï’¡¤’¾õ’ÂÖ’¶õ’´Ö’¥â’¥Ç’¥ë’¤Ë’´ð’¤­’¡¤ ’¥Î’¥¤’¥º’¥×’¥í’¥»’¥¹’¤Ë’Çò’¿§’¥¬’¥¦’¥·’¥¢’¥ó’¤ò’²¾’Äê’¤·’¤¿’Àþ’·Á’¥À’¥¤’¥Ê’¥ß ’¥«’¥ë’¥·’¥¹’¥Æ’¥à’¥â’¥Ç’¥ë’¤ò’¹Í’¤¨’¡¤’Êђʬ’¥Ù’¥¤’¥º’Ë¡’¤Ë’¤è’¤ë’¿ä’Ä꒤Ȓ¥â’¥Ç’¥ë’Áª’Âò’¤ò ’¹Ô’¤¦’¤¿’¤á’¤Î’¿·’¤¿’¤Ê’¼ê’Ë¡’¤ò’Äó’°Æ’¤·’¤¿’¡¥’ËÜ’¼ê ’Ë¡’¤ò’½Ð’²ê’¹Ú’Ê쒺ْ˦’¼þ’´ü’¤Ë’´Ø’¤¹’¤ë’¸ø’³«’¥Ç’¡¼’¥¿’¥»’¥Ã’¥È’¤Ë’Ŭ’ÍÑ’¤·’¤¿’¤È’¤³’¤í’¡¤’½¾’Íè’¼ê’Ë¡’¤Ç ’Áª’Âò’¤µ’¤ì’¤¿’¥â’¥Ç’¥ë’¤È’Èæ’³Ó’¤·’¡¤’¤è’¤ê’ñ’½ã’¤«’¤Ä’Ìà’¤â’¤é’¤·’¤¤’¥â’¥Ç’¥ë’¤¬’Áª’Âò’¤µ’¤ì’¤¿’¡¥’¤Þ ’¤¿’¡¤’¤³’¤Î’·ë’²Ì’ÆÀ’¤é’¤ì’¤¿’¥â’¥Ç’¥ë’¥Ñ’¥é’¥á’¡¼’¥¿’¤Ï’¡¤’À¸’ʪ’³Ø’Ū’¤Ê’¹Í’»¡’¤È’ÎÉ’¤¯’°ì’Ã×’¤·’¤¿’¡¥’¿Í ’¹©’¥Ç’¡¼’¥¿’¤Ø’¤Î’Ŭ’ÍÑ’¤â’¹Ô’¤¤’¡¤’¥Î’¥¤’¥º’¤ò’´Þ’¤à’»þ’·Ï’Îó’¥Ç’¡¼’¥¿’¤Ë’ÂÐ’¤¹’¤ë’Í­’¸ú’À­’¤¬’¼¨’¤µ’¤ì’¤¿’¡¥

’ºÇ’¸å’¤Ë’¡¤’°ä’ÅÁ’»Ò’ȯ’¸½’¤«’¤é’¤Î’´â’¤Î’ÉÂ’Íý’¿Ç’ÃÇ’¤ò’ÁÛ’Äê’¤·’¤¿’¡¤ ’¿·’¤¿’¤Ê’¿’¥¯’¥é’¥¹’¼±’ÊÌ’Ë¡’¤Ë’¤Ä’¤¤’¤Æ’½Ò’¤Ù’¤ë’¡¥’ËÜ’¼ê’Ë¡’¤Ç’¤Ï’¡¤’¿’¥¯’¥é’¥¹’¼±’ÊÌ’Ìä’Âê’¤ò’°ì’ÂÐ’°ì’¥Ú’¥¢’¤ä’°ì’ÂÐ’»Ä’¤ê ’¥Ú’¥¢’¤Ê’¤É’¤Î’¥é’¥Ù’¥ë’¤Î’Ǥ’°Õ’¤Î’ÁÈ’¤ß’¹ç’¤ï’¤»’¤«’¤é’À®’¤ë2’Ã͒ʬ’Îà’Ìä’Âê’·²’¤Ë’ʬ’²ò’¤·’¡¤’³Æ’Ìä ’Â꒤ǒ¤Î’Ƚ’ÊÌ’·ë’²Ì’¤ò’Åý’¹ç’¤¹’¤ë’¤³’¤È’¤Ë’¤è’¤Ã’¤Æ’ºÇ’Ŭ’¤Ê’¼±’ÊÌ’·ë’²Ì’¤ò’ÆÀ’¤ë’¡¥’³Æ2’Ã͒ʬ’Îà’Ìä ’Â꒤˒¤ª’¤±’¤ë’¿¿’¤Î’ʬ’Îà’³Î’Î¨’¤¬’¥¯’¥é’¥¹’½ê’°’³Î’Ψ’¤ò’¥Ñ’¥é’¥á’¡¼’¥¿’¤È’¤·’¤¿’³Î’Ψ’¥â’¥Ç’¥ë’¤Ë’¤è’¤Ã ’¤Æ’À¸’À®’¤µ’¤ì’¤ë’¤È’¹Í’¤¨’¡¤’¤³’¤ì’¤ò2’Ã͒ʬ’Îà’´ï’¤Ë’¤è’¤Ã’¤Æ’ÆÀ’¤é’¤ì’¤¿’ʬ’Îà’³Î’Î¨’¤Î’¿ä’Äê’ÃÍ’¤« ’¤é’¿ä’Äê’¤¹’¤ë’Êý’Ë¡’¡¤’¤µ’¤é’¤Ë2’Ã͒ʬ’Îà’´ï’¤Î’½Å’¤ß’¤ò’¿ä’Äê’¤¹’¤ë’Êý’Ë¡’¤ò’Ƴ’¤¤’¤¿’¡¥ ’ËÜ’¼ê’Ë¡’¤ò’¿Í’¹©’¥Ç’¡¼’¥¿’¤ª’¤è’¤Ó’¹Ã’¾õ’Á£’¤¬’¤ó’ʬ’Îà’Ìä’Âê’¤ò’¤Ï’¤¸’¤á’¤È’¤·’¤¿’¼Â’¥Ç’¡¼’¥¿’¤Ë’Ŭ ’ÍÑ’¤·’¡¤’½¾’Í蒤Β¥Ò’¥å’¡¼’¥ê’¥¹’¥Æ’¥£’¥¯’¥¹’¤Ë’¤è’¤ë’Åê’ɼ’Ë¡’¤È’Ʊ’Åù’°Ê’¾å’¤Î’À­’ǽ’¤ò’ã’À®’¤¹’¤ë’¤³’¤È’¤ò’¼¨ ’¤·’¤¿’¡¥’¤µ’¤é’¤Ë’¡¤’¤³’¤Î’ʬ’ÌǒÄó’°Æ’¤µ’¤ì’¤Æ’¤­’¤¿’¤¤’¤¯’¤Ä’¤«’¤Î’¿’¥¯’¥é’¥¹’¼±’ÊÌ’Ë¡’¤È’¤Î’Èæ’³Ó ’¤ò’¹Ô’¤¤’¡¤’ËÜ’¼ê’Ë¡’¤Î’Í¥’°Ì’À­’¤ª’¤è’¤Ó’À­’¼Á’¤ò’ÌÀ’¤é’¤«’¤Ë’¤·’¤¿’¡¥

important how to achieve QoS which meets user's requirements within these restrictions.

With the development of mobile systems and wireless networks, various kinds of mobile terminals become part of distributed multimedia systems. However, the restrictions, especially the limitation of battery amount restricts the quality of video/audio playback, leading to the end user's dissatisfaction. So, we need a technique to adapt application-level QoS for end mobile users depending on battery amount. With the development of distributed multi-media systems, the performance of end terminals and user's requirements become manifold. In order to provision multimedia streaming services to multiple users, the multi-media systems should be highly functional, scalable and robust. For this purpose, the traditional server/client architecture is already obsolete. Instead, we need a new architecture including an efficient delivery network based on peer-to-peer overlay network and functional components distributed among multiple distant nodes for accommodating a large number of users and continuing multimedia services even with node/link failures. In order to guarantee the performance and/or appropriateness of QoS adaptation mechanisms implemented as a software system, it is important to test whether each mechanism is correctly implemented, without executing the whole system. So a new method for testing QoS in multimedia systems is indispensable. This thesis provides the following three research topics.

First, in order to guarantee the correctness of QoS adaptation mechanisms, we propose a testing method for QoS functions in distributed multi-media systems. In the proposed test method, we use a statistical approach where test sequences take samplings of actual frame rates and/or time lags when an IUT (implementation under test) is executed, and report test results from ratio of samplings with low quality below a threshold in a normal distribution of all samplings.

Secondly, a QoS adaptation method for streaming video playback for portable computing devices where playback quality of each video segment is automatically adjusted from the remaining battery amount, desirable playback duration and the user's preference to each segment, is proposed. In this method, we assume that video segments are classified into several predefined categories. Each user specifies relative importance among categories and preferred video property such as motion speed and vividness for each category. From the information, playback quality and property of each category are determined so that the video playback can last for the specified duration within the battery amount.

Finally, a new video delivery method called MTcast (Multiple Transcode based video multicast) is proposed. It achieves efficient simultaneous video delivery to multiple users with different quality requirements by relying on user nodes to transcode and forward video to other user nodes. In MTcast, each user specifies a quality requirement for a video consisting of bitrate, picture size and frame rate based on the user's environmental resource limitation. All users can receive video with the specified quality (or near this quality) along a single delivery tree.

Some experimental results show that our proposed test method works effectively for QoS functional tests in a typical multimedia playback program, and our QoS adaptation method improves playback quality of important categories a few times better than flattening the playback quality. Through simulations, our video delivery method can achieve much higher user satisfaction degree and robustness against node failure than the layered multicast method.


0361023 ’Å·’ÌÜ ’δ’Ê¿
’¡Ö’¥¦’¥§’¥¢’¥é’¥Ö’¥ë’³È’Ä¥’¸½’¼Â’´¶’¥·’¥¹’¥Æ’¥à’¤ò’Íø’ÍÑ’¤·’¤¿’°Ì’ÃÖ’°Í’¸’¾ð’Êó’¤Î’Ä󒼨’¤Ë’´Ø’¤¹’¤ë’¸¦’µæ’¡×

’ȯ’ɽ’¹¼’³µ
’¥æ’¡¼’¥¶’¤¬’Áõ’Ã咲Ēǽ’¤Ê’¥¦’¥§’¥¢’¥é’¥Ö’¥ë’¥³’¥ó’¥Ô’¥å’¡¼’¥¿’¾å’¤Ç’¸½’¼Â’´Ä’¶­’¤È’²¾’ÁÛ’´Ä’¶­’¤Î’Í»’¹ç’Ä󒼨’¤¬’²Ä’ǽ’¤Ê’³È’Ä¥’¸½’¼Â’´¶’¤ò’Íø’ÍÑ’¤¹’¤ë’¤³’¤È’¤Ç’¡¤’¥æ’¡¼’¥¶’¤Î’´ã’Á°’¤Î’É÷’·Ê’¤Ë’¾ð’Êó’¤ò’½Å’¾ö’ɽ’¼¨ ’¤¹’¤ë’¤³’¤È’¤¬’²Ä’ǽ’¤È’¤Ê’¤ê’¡¤’¤½’¤Î’ÁÈ’¤ß’¹ç’¤ï’¤»’¤Ç’¤¢’¤ë’¥¦’¥§’¥¢’¥é’¥Ö’¥ë’³È’Ä¥’¸½’¼Â’´¶’¥·’¥¹’¥Æ’¥à’¤Ï’°Ì’ÃÖ’°Í’¸’¾ð’Êó’¤Î’Ä󒼨’¥·’¥¹’¥Æ’¥à’¤È’¤·’¤Æ’Âç’¤¤’¤Ë’Ãí’ÌÜ’¤µ’¤ì’¤Æ’¤¤’¤ë’¡¥’Í­’ÍÑ’À­’¤Î’¹â’¤¤’¥¦’¥§ ’¥¢’¥é’¥Ö’¥ë’³È’Ä¥’¸½’¼Â’´¶’¥·’¥¹’¥Æ’¥à’¤ò’¹½’ÃÛ’¤¹’¤ë’¤¿’¤á’¤Ë’¤Ï’¡¤1)’¥·’¥¹’¥Æ’¥à’¤Î’Íø’ÍÑ’²Ä’ǽ’¤Ê’´Ä’¶­’¤Ë’´Ø’¤¹’¤ë’³È’Ä¥’À­’¡¤2)’¥³’¥ó’¥Æ’¥ó’¥Ä’¤Î’¿ô’¤ª’¤è’¤Ó’¼ï’Îà’¤Ë’´Ø’¤¹’¤ë’³È’Ä¥’À­’¡¤’¤ò’Ëþ’¤¿’¤¹’ɬ ’Í×’¤¬’¤¢’¤ë’¡¥’ËÜ’¸¦’µæ’¤Ç’¤Ï’¡¤’¤³’¤ì’¤é’¤Î’³È’Ä¥’À­’¤ò’Ëþ’¤¿’¤¹’¥¦’¥§’¥¢’¥é’¥Ö’¥ë’³È’Ä¥’¸½’¼Â’´¶’¥·’¥¹’¥Æ’¥à’¤ò’Äó’°Æ’¤¹’¤ë’¡¥

’Ëܒȯ’ɽ’¤Ç’¤Ï’¡¤’¤Þ’¤º’¥¦’¥§’¥¢’¥é’¥Ö’¥ë’³È’Ä¥’¸½’¼Â’´¶’¥·’¥¹’¥Æ’¥à’¤Ë’¤ª’¤±’¤ë’µ»’½Ñ’²Ý’Â꒤Ȓ½¾’Íè’¸¦’µæ’¤ò’³µ’´Ñ’¤·’¡¤’ËÜ’¸¦’µæ’¤Î’ÌܒŪ’¤È’°Õ’µÁ’¤ò’ÌÀ’³Î’¤Ë ’¤¹’¤ë’¡¥’¼¡’¤Ë’¡¤’Äó’°Æ’¤¹’¤ë’¥¦’¥§’¥¢’¥é’¥Ö’¥ë’³È’Ä¥’¸½’¼Â’´¶’¥·’¥¹’¥Æ’¥à’¤Î’³µ’Í×’¤Ë’¤Ä’¤¤’¤Æ’½Ò’¤Ù’¤ë’¡¥’¼¡’¤Ë’¡¤’¹­’°è’´Ä’¶­’¤Ç’Íø’ÍÑ’²Ä’ǽ’¤Ê’Àä’ÂÐ’°Ì’ÃÖ’¤Î’Ʊ’Ä꒤ȒÁê’ÂÐ’°Ü’ư’ÎÌ’¤Î’¿ä’Äê’¤ò’Íø’ÍÑ’¤·’¤¿’¥æ’¡¼ ’¥¶’°Ì’ÃÖ’·×’¬’¼ê’Ë¡’¡¤’¤ª’¤è’¤Ó’·×’¬’´Ä’¶­’¤Î’¹½’ÃÛ’¤Ë’¤Ä’¤¤’¤Æ’½Ò’¤Ù’¤ë’¡¥’¤µ’¤é’¤Ë’¡¤’¥³’¥ó’¥Æ’¥ó’¥Ä’¥Ç’¡¼’¥¿’¥Ù’¡¼’¥¹’¤Î’¹½’ÃÛ’¤È’³È’Ä¥’¸½’¼Â’´Ä’¶­’¤Ë’¤ª’¤±’¤ë’¥Ó’¥å’¡¼’¥Þ’¥Í’¡¼’¥¸’¥á’¥ó’¥È’¼ê’Ë¡’¤Ë’¤Ä’¤¤’¤Æ’½Ò ’¤Ù’¡¤’Äó’°Æ’¥·’¥¹’¥Æ’¥à’¤Î’¥³’¥ó’¥Æ’¥ó’¥Ä’¤Î’¿ô’¤ª’¤è’¤Ó’¼ï’Îà’¤Ë’´Ø’¤¹’¤ë’³È’Ä¥’À­’¤ò’¼¨’¤¹’¡¥’¼¡’¤Ë’¡¤’¥¦’¥§’¥¢’¥é’¥Ö’¥ë’³È’Ä¥’¸½’¼Â’´¶’¥·’¥¹’¥Æ’¥à’¤ò’Íø’ÍÑ’¤·’¤¿’°Ì’ÃÖ’°Í’¸’¾ð’Êó’Ä󒼨’¤Î’¼Â’ÍÑ’Î㒤Ȓ¤·’¤Æ’¡¤’ËÜ ’³Ø’Æâ’¤Ë’¤ª’¤±’¤ë’¥Ê’¥Ó’¥²’¡¼’¥·’¥ç’¥ó’¥·’¥¹’¥Æ’¥à’¤È’²°’³°’´Ñ’¸÷’°Æ’Æâ’¥·’¥¹’¥Æ’¥à’¤Î’¥×’¥í’¥È’¥¿’¥¤’¥×’¤Ë’¤Ä’¤¤’¤Æ’½Ò’¤Ù’¤ë’¡¥’ºÇ’¸å’¤Ë’ËÜ’¸¦’µæ’¤ò’Á풳璤·,’º£’¸å’¤Î’Ÿ’˾’¤ò’½Ò’¤Ù’¤ë’¡¥


0361016 ’Ãݒ¼ ’·û’ÂÀ’Ϻ
’¡Ö’¼Â’¶õ’´Ö’¤Ë’¤ª’¤±’¤ë’Ãí’»ë’ÂÐ’¾Ý’¡¦’°Ì’ÃÖ’¤Î’¿ä’Ä꒤Ȓ¤½’¤Î’±þ’ÍÑ’¤Ë’´Ø’¤¹’¤ë’¸¦’µæ’¡×

’ȯ’ɽ’¹¼’³µ
’¡Ö’¸«’¤ë’¡×’¤È’¤¤’¤¦’¹Ô’°Ù’¤Ï’¿Í’¤Î’¶½’Ì£’¡¦’´Ø’¿´’¤ò’¼¨’¤¹’Âå’ɽ’Ū’¤Ê’ư’ºî’¤Ç’¤¢’¤ê’¡¤’»ë’Àþ’·×’¬’µ» ’½Ñ’¤Ï’¥Ò’¥å’¡¼’¥Þ’¥ó’¥³’¥ó’¥Ô’¥å’¡¼’¥¿’¥¤’¥ó’¥¿’¥é’¥¯’¥·’¥ç’¥ó’¤ä’¼«’ư’¼Ö’¹©’³Ø’Åù’¤Î’¿’¤¯’¤Î’ʬ’Ìî ’¤Ç’´ü’ÂÔ’¤µ’¤ì’¤Æ’¤¤’¤ë’¡¥’ËÜ’¸¦’µæ’¤Ç’¤Ï’¿Í’¤Î’¶½’Ì£’¡¦’´Ø’¿´’¤ò’Ã꒽В¤¹’¤ë’¼ê’³Ý’¤«’¤ê’¤È’¤·’¤Æ’ÆÃ ’¤Ë’Ãí’»ë’ÂÐ’¾Ý’¡¦’°Ì’ÃÖ’¤Ë’Ãí’ÌÜ’¤·’¡¢’¼Â’¶õ’´Ö’¤Ë’¤ª’¤±’¤ë’¿ä’Äê’¼ê’Ë¡’¤Î’Äó’°Æ’¤ò’¹Ô’¤¦’¡¥

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0361029 ’ȧ’»³ ’´²’¾Ï
’¡ÖStudies on Interconnection Architecture for Traceback Systems in Practical Network Operation’¡×

Abstract
This research proposes an architecture to interconnect different traceback systems for tracing attacks beyond the operational barriers on the inter-domain network and for tracking attacks narrow down from layer 3 traceback to layer 2 traceback on the intra-domain network.

In order to defend attacks on the Internet, traceback techniques are requiredas well as attack detection techniques and attack protection techniques. Network operators can manually trace back attacks, but it is likely to be tedious process and spends much more time. Many researcher have proposed various traceback techniques to automate the manual traceback, however, they faced several difficulties. On the inter-domain traceback, the issues arise from the difficulties to overcome the barriers on network operation boundaries, especially the leakage of sensitive information, the violation of the administrative permission, the difference of employed techniques among Autonomous Systems (ASes) and the cooperation among ASes. On the other hand, the challenge of the intra-domain traceback is how to detect the attacker node inside a network domain even when both the source IP address and the source MAC address of an attack packet are spoofed. The interconnection between layer 3 traceback techniques and layer 2 traceback techniques is also an issue of the inter-domain traceback because most traceback techniques on each layer cannot track attacks on other layer.

In this research, we propose InterTrack as an interconnection architecture for traceback systems, Ingress Port Based Tracking (IPBT) method as a layer 2 tracback technique, and L2-SPIE as a technique to interconnect a layer 3 traceback and a layer 2 traceback. The contributions of this research are as follows:

The loose cooperation among ASes on the deployment traceback systems and on traceback operation: We designed the InterTrack architecture and InterTrack messages for the loose cooperation among ASes. The ITM trace reply message contains only the reverse AS path information, and it doesn’¡Çt contain the detailed topologies of ASes. Through the module components, ASes can choose traceback techniques for the internal use in accordance with the pros and cons of each technique or the investment cost.

The same manner of the traceback operation as the manner of other network operations: The phased tracking approach of InterTrack was designed along with the network operation boundaries on the routing operation. By phasing an inter-domain traceback into four stages, ASes can authorize the users on each stage. ASes can also delegate the internal traceback operation to the organizations on the IGP sub-domains.

Expedition of the procedures on the inter-domain traceback: The preliminary experiments of InterTrack show that the average time of a trial on InterTrack was estimated as 14 seconds with a hash digest logging based border tracking system in 9 AS hop length. The model of the border tracking technique for identifying upstream neighbor ASes: We modeled the border tracking technique for detect the neighbor ASes on the attack path. According to this model, we developed a sample border tracking implementation by using PAFFI, a hash digest logging based traceback product.

The detailed internal inspection about the source of an attack packet: Our IPBT method can track back a single packet on a layer 2 network to the port to which an attacker node connects despite the source spoofed characteristic of the IP address and the MAC address.

An interconnection between a hash digest logging method on the layer 3 traceback and IPBT method on the layer 2 traceback: We developed a prototype implementation of L2-SPIE which interconnects hash digest loggin method as a layer 3 traceback and our IPBT method as a layer 2 traceback. The evaluation result shows the average time of a traceback trial on L2-SPIE was about 1,500 microseconds.

The foundation of the self-defending network architecture: InterTrack and L2-SPIE provide a multi-layers traceback to detect the attacker nodes from the layer 3 traceback to the layer 2 traceback. We also designed InterTrack to cooperate other detection systems and protection systems for the multi-layers traceback and the attack mitigations.

In the presentation, I talk about the details of these proposals.

The public hearing will be in Japanese.


0361022 ’»û’ÏÆ ’¿µ’°ì
’¡ÖERM’ÃÁ’Çò’¼Á’¤Ë’¤è’¤ëNHERF’ǧ’¼±’¤Î’¹½’¤’Ū’´ð’ÁÃ’¡×

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0361003 ’ÃÓ’ÅÄ ’À»
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0461202 ’Åç’¼ ’½á
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