Dependable System

Research Staff

  • Prof. Michiko Inoue

    Michiko Inoue

  • Assoc.Prof. Fukuhito Ooshita

    Fukuhito Ooshita

  • Assist.Prof. Michihiro Shintani

    Michihiro Shintani

E-mail dsl-contact [at]

Research Area

VLSI design and testing: We tackle various problems in VLSI design and testing to overcome the VLSI design and testing challenges that occur due to scale enlargement, process miniaturization, high performance and low power.

VLSI design for testability

Reliable design and testing for memory

Hardware Trojan detection

High quality VLSI testing (timing-related faults, low-power testing, low-temperature testing, etc.)

Circuit and system mechanisms for high field reliability

Design and testing for 3D-LSIs

Software-based self-testing for high performance micro-processors

Test flow optimization using data-mining techniques

Distributed and parallel algorithms: We focus on designing various algorithms to improve dependability and performance of various parallel and distributed systems, ranging from nano-scale systems to the Internet.

Fault-tolerant distributed systems

Wait-free distributed algorithms

Self-stabilizing algorithms

Mobile agent algorithms

Nano-scale distributed algorithms

Parallel algorithms for multi-core processors

Parallel algorithms for LSI CAD

Key Features

Today's information society is supported by various levels of advanced technology such as applications, systems, computers and VLSIs. The Dependable System Laboratory is pursuing research on safe and secure systems including distributed systems with hundreds of computers and VLSIs with billions of transistors. "Dependability" is a concept from the user's point of view, when systems can be used reliably and securely.

In order to achieve dependable systems, we need to consider various aspects of these systems from the user's point of view. For example, whether all the systems are completely tested before shipping and those failing inspection are withheld, whether the systems can work correctly in the presence of faults, whether the systems can predict and avoid system failure caused by transistor aging, and whether the system can handle malicious users. This laboratory performs research to improve dependability through various approaches.

The Dependable System Lab also fosters skills for theoretical thinking, presentation, design and analysis of algorithms, traditional C/C++ and Java programming, advanced multi-thread programming, and Verilog/VHDL hardware programming through our research.

Fig.1:VLSI design and test flow1

Fig.1:VLSI design and test flow

Fig.1:VLSI design and test flow2

Fig.2:DART: Dependable Architecture with Reliability Testing

Fig.2:DART: Dependable Architecture with Reliability Testing

Fig.3:Various types of distributed systems

Fig.3:MUTEX algorithm Tree-Skip

Fig.4:MUTEX algorithm tree-skip