Dependable System

Research Staff

  • Prof. Michiko Inoue

    Michiko Inoue

  • Assist.Prof. Tomokazu Yoneda

    Tomokazu Yoneda

  • Assist.Prof. Yuta Yamato

    Yuta Yamato

E-mail dsl-contact [at]

Research Area

To overcome VLSI design and test challenges occurring due to scale enlargement, process miniaturization, high performance and low power, we are tackling various problems in VLSI design and testing, along with reliable and dependable systems.

VLSI Design for Testability

Design and Testing for 3D-LSIs

High quality testing (timing-related faults, low-power testing, low-temperature testing, etc.)

Fault detection and diagnosis of VLSI

Software-based self-testing for high performance micro-processors

Test architecture for failure prediction

Circuit and system mechanisms for high field reliability

We are also working on algorithms for distributed systems and parallel computers.

Fault-tolerant distributed systems

Wait-free distributed algorithms

Parallel algorithms for multi-core processors

Parallel algorithms for LSI CAD

Key Features

Today's information society is supported by various levels of advanced technology such as applications, systems, computers and VLSIs. The Dependable System Laboratory is pursuing research on safe and secure systems including distributed systems with hundreds of computers and VLSIs with billions of transistors. "Dependability" is a concept from the user's point of view, when systems can be used reliably and securely.

In order to achieve dependable systems, we need to consider various aspects of these systems from the user's point of view. For example, if all the systems are completely tested and the bad systems have not been shipped, if the systems can work correctly in the presence of faults, if the systems can predict and avoid system failure caused by transistor aging, and if the system can handle malicious users. This laboratory is performing research to improve dependability from various approaches.

The Dependable System Lab also fosters skills for theoretical thinking, presentation, design and analysis of algorithms, traditional C/C++ and Java programming, advanced multi-thread programming, and Verilog/VHDL hardware programming through research.

Fig.1:VLSI design and test flow1 Fig.1:VLSI design and test flow2

Fig.1:VLSI design and test flow

Fig.2:DART: Dependable Architecture with Reliability Testing

Fig.2:DART: Dependable Architecture with Reliability Testing

Fig.3:MUTEX algorithm Tree-Skip

Fig.3:MUTEX algorithm Tree-Skip